2.2 Continuous- and Discrete-Time Dynamic Models

Two time descriptions¶

Physical laws are often expressed continuously,

\dot{x}(t)=A(p)x(t)+B(p)u(t)+E(p)d(t),

while digital controllers update at sample times $t_k=kT_s$ ,

x_{k+1}=A_d(p,T_s)x_k+B_d(p,T_s)u_k+E_d(p,T_s)d_k.

Under a zero-order hold,

A_d=e^{AT_s}, \qquad B_d=\int_0^{T_s}e^{A\tau}B\,d\tau.

Discretization is therefore not a clerical conversion. Sampling time interacts with plant eigenvalues, actuator bandwidth, delay, estimator quality, computational cost, and the number of decision variables in an optimal-control transcription.

A CCD interpretation¶

A lighter or more flexible plant may introduce a faster mode. The old sample time can then become inadequate. A faster controller may require a more expensive processor or sensor, increasing power and cost. If sample time is fixed while the plant changes, the optimizer may select a design that is acceptable in the continuous model but unstable or poorly damped when implemented.

For a rough rule, the sample frequency should exceed the important closed-loop bandwidth by a comfortable factor. The correct factor depends on delay, filtering, phase margin, and implementation method; it must be verified rather than assumed.

Exact discretization in Python¶

import numpy as np
from scipy.signal import cont2discrete

m, c, k = 2.0, 8.0, 120.0
A = np.array([[0.0, 1.0], [-k/m, -c/m]])
B = np.array([[0.0], [1.0/m]])
C = np.eye(2)
D = np.zeros((2, 1))

for Ts in (0.001, 0.01, 0.05):
    Ad, Bd, _, _, _ = cont2discrete((A, B, C, D), Ts, method="zoh")
    print(f"Ts={Ts:0.3f} s, discrete poles={np.linalg.eigvals(Ad)}")

m = 2; c = 8; k = 120;
A = [0 1; -k/m -c/m];
B = [0; 1/m];
sysc = ss(A,B,eye(2),zeros(2,1));
for Ts = [0.001 0.01 0.05]
    sysd = c2d(sysc,Ts,'zoh');
    fprintf('Ts = %.3f s, max pole magnitude = %.5f\n', ...
            Ts,max(abs(eig(sysd.A))));
end

Time-step convergence¶

Simulation and optimization time steps serve different purposes. A simulation step must resolve dynamic behavior accurately. A controller sample time defines information and command updates. A transcription mesh also controls optimization accuracy. These can differ, but each needs a convergence study.

Activity 2.2: sampling as a design constraint¶

Activity 2.2: sampling as a design constraint

A beam redesign raises the first flexible-mode frequency from $f_1=8$ Hz to $f_1=28$ Hz. The mode has damping ratio $\zeta=0.02$ . A digital implementation is acceptable only if it provides at least 12 samples per modal period, contributes no more than $20^\circ$ of delay phase at the mode, and uses no more than 70% of the processor time.

For each computing architecture, use

N_s=\frac{f_s}{f_1}, \qquad \phi_d=360f_1\tau_d, \qquad U_{\mathrm{CPU}}=f_st_{\mathrm{comp}},

and map the continuous modal poles to discrete time using

s_{1,2}=-\zeta\omega_n\pm j\omega_n\sqrt{1-\zeta^2}, \qquad z_{1,2}=e^{s_{1,2}T_s}.

Architecture	$f_s$	Total delay $\tau_d$	Computation per update	Cost
Legacy	100 Hz	4.0 ms	1.2 ms	USD 120
Midrange	500 Hz	1.8 ms	1.0 ms	USD 260
High-speed	1,000 Hz	1.0 ms	0.65 ms	USD 480

For both the 8 Hz and 28 Hz plants, calculate $N_s$ and $\phi_d$ for all three architectures and mark every sampling, phase, and CPU constraint as feasible or infeasible.
Compute the magnitude and angle of the discrete modal pole for the legacy architecture before and after the beam redesign. Explain why a pole remaining inside the unit circle does not by itself establish adequate sampled-data performance.
Select the least-cost feasible architecture for the redesigned beam.
Holding $f_s=500$ Hz, calculate the maximum allowable total delay from the phase constraint. State the remaining delay margin for the midrange architecture.
Explain why $T_s$ and $\tau_d$ must be included as architecture-dependent quantities when $f_1$ is a plant-design outcome.